逻辑与计算机设计基础(英文版·第4版)

目 录内容简介
Preface
Chapter 1
DIGITAL SYSTEMS AND INFORMATION
1-1 Information Representation
The Digital Computer
Beyond the Computer
More on the Generic Computer
1-2 Number Systems
Binary Numbers
Octal and Hexadecimal Numbers
Number Ranges
1-3 Arithmetic Operations
Conversion from Decimal to Other Bases
1-4 Decimal Codes
BCD Addition
1-5 Alphanumeric Codes
ASCII Character Code
Parity Bit
1-6 Gray Codes
1-7 Chapter Summary
References
Problems
Chapter 2
COMBINATIONAL LOGIC CIRCUITS
2-1 Binary Logic and Gates
Binary Logic
Logic Gates
2-2 Boolean Algebra
Basic Identities of Boolean Algebra
Algebraic Manipulation
Complement of a Function
2-3 Standard Forms
Minterms and Maxterms
Sum of Products
Product of Sums
2-4 Two-Level Circuit Optimization
Cost Criteria
Map Structures
Two-Variable Maps
Three-Variable Maps
2-5 Map Manipulation
Essential Prime Implicants
Nonessential Prime Implicants
Product-of-Sums Optimization
Dont-Care Conditions
2-6 Pragmatic Two-Level Optimization
2-7 Multiple-Level Circuit Optimization
2-8 Other Gate Types
2-9 Exclusive-OR Operator and Gates
Odd Function
2-10 High-Impedance Outputs
2-11 Chapter Summary
References
Problems
Chapter 3
COMBINATIONAL LOGIC DESIGN
3-1 Design Procedure
3-2 Beginning Hierarchical Design
3-3 Technology Mapping
3-4 Verification
Manual Logic Analysis
Simulation
3-5 Combinational Functional Blocks
3-6 Rudimentary Logic Functions
Value-Fixing, Transferring, and Inverting
Multiple-Bit Functions
Enabling
3-7 Decoding
Decoder and Enabling Combinations
Decoder-Based Combinational Circuits
3-8 Encoding
Priority Encoder
Encoder Expansion
3-9 Selecting
Multiplexers
Multiplexer-Based Combinational Circuits
3-10 Chapter Summary
References
Problems
Chapter 4
ARITHMETIC FUNCTIONS AND HDLs
4-1 Iterative Combinational Circuits
4-2 Binary Adders
Half Adder
Full Adder
Binary Ripple Carry Adder
4-3 Binary Subtraction
Complements
Subtraction Using 2s Complement
44 Binary Adder-Subtractors
Signed Binary Numbers
Signed Binary Addition and Subtraction
Overflow
4-5 Other Arithmetic Functions
Contraction
Incrementing
Decrementing
Multiplication by Constants
Division by Constants
Zero Fill and Extension
4-6 Hardware Description Languages
Hardware Description Languages
Logic Synthesis
4-7 HDL Representations-VHDL
Behavioral Description
4-8 HDL Representations-Verilog
Behavioral Description
4-9 Chapter Summary
References
Problems
Chapter 5
SEQUENTIAL CIRCUITS
5-1 Sequential Circuit Definitions
5-2 Latches
SR and S R Latches
D Latch
5-3 Flip-Flops
Master-Slave Flip-Flops
Edge-Triggered Flip-Flop
Standard Graphics Symbols
Direct Inputs
5-4 Sequential Circuit Analysis
Input Equations
State Table
State Diagram
Sequential Circuit Simulation
54 Sequential Circuit Design
Design Procedure
Finding State Diagrams and State Tables
State Assitmment
Designing with D Flip-Flops
Designing with Unused States
Verification
5-6 Other Flip-Flop Types
JK and T Flip-Flops
5-7 State-Machine Diagrams and Applications
State-Machine Diagram Model
Constraints on Input Conditions
Design Applications Using State-Machine Diagrams
5-8 HDL Representaion for Sequential Circuits-VHDL
5-9 HDL Representation for Sequential Circuits-Verilog
5-10 Chapter Summary
References
Problems
……
Chapter 6
Chapter 7
Chapter 8
Chapter 9
Chapter 10
Chapter 11
Chapter 12
Chapter 13
Chapter 1
DIGITAL SYSTEMS AND INFORMATION
1-1 Information Representation
The Digital Computer
Beyond the Computer
More on the Generic Computer
1-2 Number Systems
Binary Numbers
Octal and Hexadecimal Numbers
Number Ranges
1-3 Arithmetic Operations
Conversion from Decimal to Other Bases
1-4 Decimal Codes
BCD Addition
1-5 Alphanumeric Codes
ASCII Character Code
Parity Bit
1-6 Gray Codes
1-7 Chapter Summary
References
Problems
Chapter 2
COMBINATIONAL LOGIC CIRCUITS
2-1 Binary Logic and Gates
Binary Logic
Logic Gates
2-2 Boolean Algebra
Basic Identities of Boolean Algebra
Algebraic Manipulation
Complement of a Function
2-3 Standard Forms
Minterms and Maxterms
Sum of Products
Product of Sums
2-4 Two-Level Circuit Optimization
Cost Criteria
Map Structures
Two-Variable Maps
Three-Variable Maps
2-5 Map Manipulation
Essential Prime Implicants
Nonessential Prime Implicants
Product-of-Sums Optimization
Dont-Care Conditions
2-6 Pragmatic Two-Level Optimization
2-7 Multiple-Level Circuit Optimization
2-8 Other Gate Types
2-9 Exclusive-OR Operator and Gates
Odd Function
2-10 High-Impedance Outputs
2-11 Chapter Summary
References
Problems
Chapter 3
COMBINATIONAL LOGIC DESIGN
3-1 Design Procedure
3-2 Beginning Hierarchical Design
3-3 Technology Mapping
3-4 Verification
Manual Logic Analysis
Simulation
3-5 Combinational Functional Blocks
3-6 Rudimentary Logic Functions
Value-Fixing, Transferring, and Inverting
Multiple-Bit Functions
Enabling
3-7 Decoding
Decoder and Enabling Combinations
Decoder-Based Combinational Circuits
3-8 Encoding
Priority Encoder
Encoder Expansion
3-9 Selecting
Multiplexers
Multiplexer-Based Combinational Circuits
3-10 Chapter Summary
References
Problems
Chapter 4
ARITHMETIC FUNCTIONS AND HDLs
4-1 Iterative Combinational Circuits
4-2 Binary Adders
Half Adder
Full Adder
Binary Ripple Carry Adder
4-3 Binary Subtraction
Complements
Subtraction Using 2s Complement
44 Binary Adder-Subtractors
Signed Binary Numbers
Signed Binary Addition and Subtraction
Overflow
4-5 Other Arithmetic Functions
Contraction
Incrementing
Decrementing
Multiplication by Constants
Division by Constants
Zero Fill and Extension
4-6 Hardware Description Languages
Hardware Description Languages
Logic Synthesis
4-7 HDL Representations-VHDL
Behavioral Description
4-8 HDL Representations-Verilog
Behavioral Description
4-9 Chapter Summary
References
Problems
Chapter 5
SEQUENTIAL CIRCUITS
5-1 Sequential Circuit Definitions
5-2 Latches
SR and S R Latches
D Latch
5-3 Flip-Flops
Master-Slave Flip-Flops
Edge-Triggered Flip-Flop
Standard Graphics Symbols
Direct Inputs
5-4 Sequential Circuit Analysis
Input Equations
State Table
State Diagram
Sequential Circuit Simulation
54 Sequential Circuit Design
Design Procedure
Finding State Diagrams and State Tables
State Assitmment
Designing with D Flip-Flops
Designing with Unused States
Verification
5-6 Other Flip-Flop Types
JK and T Flip-Flops
5-7 State-Machine Diagrams and Applications
State-Machine Diagram Model
Constraints on Input Conditions
Design Applications Using State-Machine Diagrams
5-8 HDL Representaion for Sequential Circuits-VHDL
5-9 HDL Representation for Sequential Circuits-Verilog
5-10 Chapter Summary
References
Problems
……
Chapter 6
Chapter 7
Chapter 8
Chapter 9
Chapter 10
Chapter 11
Chapter 12
Chapter 13
目 录内容简介
《逻辑与计算机设计基础(英文版·第4版)》从当代工程观点讲述了逻辑与计算机设计方面的内容,自出版以来已被全球超过25万人使用。《逻辑与计算机设计基础(英文版·第4版)》以清晰的解释和逐步延伸的实例来帮助读者理解内容,实例涵盖了从简单的组合应用到建立在RISC内核基础上的CISC结构,更加重视培养读者在计算机辅助设计、问题形式化、解决方案验证和问题解决技巧方面的能力。
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